Many commercially available pacemakers employ internal microprocessors for control of various pacing functions and for mathematical calculations. An early digital pacemaker having a customized microprocessor was described, for example, in the above-referenced Hartlaub et al. patents. The inclusion of a general purpose microprocessor in an implanted devices was proposed in U.S. Pat. No. 4,407,288 to Langer et al., which patent is hereby incorporated by reference herein in its entirety.
As generally practiced, the use of a single microprocessor in an implantable device does not enable processing to be performed other than during the blanking intervals, as previously described. For a processor operating at 150,000 machine cycles per second, 18,000 machine cycles are available during a typical 120-mSec blanking period. Assuming an average of three-and-one-half machine cycles per instruction, only about 5100 instructions can be executed during a blanking interval. Certain of these instructions will be devoted to "housekeeping", memory tests, and other "overhead" tasks. Considerably more processing capability may be needed to implement more advanced features (e.g., waveform analysis, as previously described).
The number of instructions performed during the blanking interval can be increased by increasing microprocessor speed, but only at the cost of significant increases in current drain. Power consumption has always been an important consideration in the design of implantable medical devices, since it is desirable for an implantable device to be capable of operating for long periods of time before its battery is depleted. Power consumption becomes an even greater consideration in the context of implantable defibrillators and cardioverters, which as compared with pacemakers consume much larger amounts of power to deliver the larger stimulating pulses.
Relatively simple devices such as single-chamber pacemakers do not require all of the processing capability of a high speed, general purpose microprocessor, making the use of such a microprocessor inefficient for most tasks associated with timing and control of basic pacing functions. In the above-referenced Langer et al. '288 patent, there is proposed an arrangement wherein two microprocessors having differing levels of speed, processing capability, and power consumption, are incorporated into a single, multi-purpose implantable device. The microprocessors are chosen for controlling a particular type of operation to be implemented in the implantable device. In this way, a simpler, slower, and less power-consuming microprocessor is used to carry out long-term operations, while a more sophisticated processor of higher power and speed can be devoted to short-term processing-intensive operations. Also discussed in the Langer et al. '288 patent is the possibility that a single microprocessor in a multi-function implantable device could be activated in either of two modes, a slower, less-power consuming mode for long-term operations, and a faster, higher-power consuming mode for short-term, processing intensive operations.